Memory Organization and Memory Interfacing
COA└── Memory Organization ├── Memory Hierarchy ├── Semiconductor Memory ├── Memory Chip Organization │ ├── Address lines │ ├── Data lines │ ├── Capacity │ ├── Memory chips │ ├── Memory expansion │ └── Memory interfacing 👈 ├── Memory Interleaving └── Cache Memory1. Memory Representation
Section titled “1. Memory Representation”Memory is represented as:
Number of Words × Word SizeExample:
64K × 8means:
-
Number of words = 64K = 64 × 1024 = 65,536 words
-
Each word = 8 bits
Total memory capacity
= Number of words × Word size= 64K × 8 bits= 512 Kbits= 64 KBAnother example:
32K × 16means
-
32K memory locations
-
Each location stores 16 bits
2. Memory Terminology
Section titled “2. Memory Terminology”A word is one addressable memory location.
Number of words = Number of addressable memory locations (addresses)
Example:
Memory = 8 × 4Address Data000 1010001 1101010 0001...There are 8 words.
Each word stores 4 bits.
Memory Location
Section titled “Memory Location”Each memory location has a unique address.
If there are N memory locations,
Addresses = 0 to N−1Word Size
Section titled “Word Size”Number of bits stored in one memory location.
Examples
64K × 8Word size = 8 bits
16K × 32Word size = 32 bits
3. Number of Address Lines
Section titled “3. Number of Address Lines”Formula
Section titled “Formula”If memory has N words,
Address Lines = ⌈log₂(N)⌉where
N = Number of memory locations (words)
NOT total bits.
Each address line has two possible values.
1 line → 2 addresses
2 lines → 4 addresses
3 lines → 8 addresses
n lines → 2ⁿ addressesTherefore,
2ⁿ ≥ Number of wordsExamples
Section titled “Examples”Example 1
Section titled “Example 1”Memory = 64K × 8Number of words
64K
= 64 × 1024
= 65536
= 2¹⁶Hence
Address lines = 16Example 2
Section titled “Example 2”Memory = 1M × 321M = 1024K
= 2²⁰Hence
20 address linesExample 3
Section titled “Example 3”Memory = 96K × 1696K = 98304Now,
2¹⁶ = 65536
2¹⁷ = 131072Since
65536 < 98304 < 131072Hence
Address lines = 174. Number of Data Lines
Section titled “4. Number of Data Lines”Data lines depend only on the word size.
Formula
Section titled “Formula”Data Lines = Word SizeExamples
64K × 8
Data lines = 832K × 16
Data lines = 1696K × 16
Data lines = 165. Total Memory Capacity
Section titled “5. Total Memory Capacity”Formula
Section titled “Formula”Capacity
= Number of Words × Word SizeConvert into
-
bits
-
bytes
Example
Section titled “Example”32K × 832 ×1024 ×8
=262144 bits
=32768 bytes
=32 KBExample
Section titled “Example”64K ×1665536 ×16
=1048576 bits
=131072 bytes
=128 KB6. Memory Expansion
Section titled “6. Memory Expansion”Memory expansion is of two types.
1. Word Expansion
2. Bit Expansion7. Bit Expansion (Increase Word Size)
Section titled “7. Bit Expansion (Increase Word Size)”Used when
Required word size >
Available chip word size
Example
Need
64K ×16Available chips
64K ×8Each chip provides
8 bitsNeed
16 bitsTherefore
Number of chips
=16/8
=2Connection
Address Bus │ ┌────┴────┐ │ │64K×8 64K×8 │ │ D0-D7 D8-D15Both chips receive the same address.
Together they produce
64K ×168. Word Expansion (Increase Number of Words)
Section titled “8. Word Expansion (Increase Number of Words)”Used when
Required words >
Available chip words
Example
Need
64K ×8Available
32K ×8Need
64K wordsEach chip
32K wordsHence
Number of chips
=64K/32K
=2One extra address line selects the chip.
A15 │Decoder │ ┌─────┐ │ │Chip1 Chip29. Simultaneous Word and Bit Expansion
Section titled “9. Simultaneous Word and Bit Expansion”Example
Need
128K ×16Available
64K ×8Word expansion
128K/64K
=2Bit expansion
16/8
=2Total chips
2×2
=410. Number of Memory Chips
Section titled “10. Number of Memory Chips”Formula
Section titled “Formula”Number of chips
=(Required Words / Chip Words)
×
(Required Word Size / Chip Word Size)Example
Section titled “Example”Need
128K ×16Available
64K ×8Words
128K/64K=2Bits
16/8=2Total Chips
2×2=411. Number of Memory Blocks
Section titled “11. Number of Memory Blocks”Sometimes memory size is not a power of 2.
Example
96K ×16Since
96K
=64K+32KMemory is implemented as
64K ×16
+
32K ×16Therefore
Number of memory blocks =2Another example
160K
=128K+32KBlocks
128K
+
32KHence
2 blocksExample
192K
=128K+64KBlocks
128K
+
64KAgain
2 blocks12. Decoder in Memory Interfacing
Section titled “12. Decoder in Memory Interfacing”Decoder selects one memory chip among multiple chips.
If there are
2 chipsNeed
1-to-2 decoderIf
4 chipsNeed
2-to-4 decoderIf
8 chipsNeed
3-to-8 decoderGeneral rule
For N chips
Decoder input
= log₂(N)13. Important Formulas
Section titled “13. Important Formulas”Address Lines
Section titled “Address Lines”= ⌈log₂(Number of Words)⌉Data Lines
Section titled “Data Lines”= Word SizeCapacity
Section titled “Capacity”= Words × Word SizeChips Required
Section titled “Chips Required”=(Required Words / Chip Words)
×
(Required Word Size / Chip Word Size)Decoder Inputs
Section titled “Decoder Inputs”= log₂(Number of Chips)14. Frequently Asked GATE Questions
Section titled “14. Frequently Asked GATE Questions”Type 1
Section titled “Type 1”Find address lines.
Example
32K ×8
Answer
15Type 2
Section titled “Type 2”Find data lines.
Example
64K ×16
Answer
16Type 3
Section titled “Type 3”Find memory capacity.
Example
128K ×8
Answer
128 KBType 4
Section titled “Type 4”Find number of chips.
Example
Need
256K ×16Available
64K ×8Answer
Words
256K/64K=4
Bits
16/8=2
Total Chips
=8Type 5
Section titled “Type 5”Find decoder size.
Example
Need
4 chipsAnswer
2-to-4 decoderType 6
Section titled “Type 6”Find memory blocks.
Example
96K ×16Answer
64K ×16
+
32K ×16
=2 blocksExam Tricks
Section titled “Exam Tricks”-
Address lines depend only on the number of words, never on the word size.
-
Data lines are exactly equal to the word size.
-
Capacity = Words × Word Size.
-
If the number of words is not a power of 2 (e.g., 96K, 160K, 192K), split it into sums of powers of 2 to determine memory blocks.
-
Bit expansion increases the word size, word expansion increases the number of memory locations.
-
Total chips required = (Word Expansion) × (Bit Expansion).